Please bring your own paper, pencils, and erasers to each exam. No electronic devices permitted.

50 minutes, closed book, closed notes.

Primary Topics

Chapter 2

• Boolean equations, forms, and terminology (SOP, POS, minterm, etc.)
• Using Boolean algebra to simplify equations
• Logic implementations of equations (2-level, AND/OR, NAND/NAND, etc.)
• Symbols, inversion bubbles, “bubble pushing”
• Karnaugh Maps with don’t cares
• Multiplexers - function, implementation, and usage
• Decoders - function, implementation, and usage
• Priority encoders – function, implementation, and usage
• Timing - min (contamination) and max (propagation) delay
• Logic hazards (aka glitches)

Chapter 3

• Latch versus flip-flop
• SR and D latch
• D flip-flop
• Registers
• Enables, sets, and resets
• synchronous versus asynchronous control signals
• FSM Design & Analysis
  • Problem description to state table/graph
  • State assignment (binary, Gray, one-hot)
  • Next state and output equations
  • Timing waveforms showing behavior, e.g. Fig 3.27 or 3.32
  • Circuit to state table/graph
  • Mealy versus Moore
• FSM Implementation
• FSM timing and input/output relationships (i.e., Moore versus Mealy outputs) (Fig 3.32)

Not on Exam

• 3.2.7, 3.5 and beyond