#
ECE 240 - Digital Logic (Fall 2022)

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Policies

All assignments are collected at the __start__ of class
on the specified due date. Each assignment should have your name, the course
number, the date, and the assignment designation (e.g., HW1, etc.). Attendance
is mandatory. *Students who miss five or more class periods will
receive a final grade of F for the course*. (Arriving late or
leaving early is considered absent.)

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Text

Digital Design and Computer Architecture, 2nd ed., David Harris and Sarah Harris,
Morgan Kaufmann, 2013. ISBN 978-0-12-394424-5.

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Reading

- Aug 22 - Read Chapter 1
- Aug 29 - Read Chapter 2
- Sep 19 - Read through Section 3.2
- Sep 23 - Read through Section 3.4
- Oct 3 - Read the rest of Chapter 3
- Oct 17 - Read Section 5.4, then 5.2, skipping starred sections
- Oct 24 - Read Section 5.5

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Homework and Quizzes (20%)

Homework will typically be graded on a 3 point scale: 1-2 points if partially
(or poorly) completed; 3 points if completed and apparently correct.
__All homework will be collected in class at the start of the
class.__ Late homework will __not__ be accepted
without prior permission. Students may work together. There will also be unannounced quizzes
throughout the semester, covering the lectures, assigned reading, and homework.
Closed book, closed notes.

- Aug 26. Ch. 1: 4, 6, 10
- Aug 31. Ch. 1: 30, 56, 60
- Sep 7. HW3
- Sep 9. HW4
- Sep 12. Ch. 2: 26, 27, 28, 32
- Sep 19. 4-bit, 2-1 mux implementation
- Sep 21. Ch. 2: 34(b) (only segments c, e, and f), 39, 40, 42
- Sep 23. Ch. 2: 44; Implement the functions from both Ex 2.17 (a) and (b) using a single binary decoder and additional gates as needed.
- Sep 26. Ch. 3: 2, 4, 6
- Sep 28. Ch. 3: 10, 14, 16, 19
- Sep 30. Ch. 3: 22, 28, 30, 32
- Oct 3. Vending machine
- Oct 10. Ch. 3: 33-36
- Oct 21. (a)
Neatly sketch a schematic of a 3-bit up/down counter; (b) neatly sketch
a schematic of a 3-bit left/right shift register; (c) neatly
sketch the stage graph of a 3-bit maximal cycle LFSR. (See the Xilinx
app note - XAPP052) under the 240 handouts folder on my OneDrive.)
- Oct 24. Ch. 5: 1 (a,b), 2
- Oct 28. Ch. 5: 8 (use an ALU), 13 (no HDL), 16, 17
- Nov 16. Pattern match circuit and Where That Zero? designs

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Exams (80%)

Each exam is worth 100 points and will be closed book, closed notes, no electronics permitted.
Semester exams are 50 minutes long; the final exam
will be
two hours long and comprehensive. Please bring paper,
pencils,
and erasers to exams.
- Sep 14. Exam topics
- Oct 12. Exam topics
- Nov 7. Exam topics
- Final Exam. Mon, Dec 12, 10:15 am - 12:15 pm. Exam topics

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Grading

Course grades will be available through Canvas. Final grades will be
calculated using the traditional scale (90%=A, 80%=B, etc.).

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Handouts

Available on OneDrive.