Final Exam Topics (Readings, Lectures, HW, and Projects)
120 minutes, 100 points. Closed book, open notes.
Please bring your own paper (including graph
paper), a calculator,
a pencil, a ruler, and an eraser. No electronic devices permitted.
Material from Previous Exam Topics
New (or kinda new) Topics
- Synchronization and crossing clock domains
- Handshakes and FIFOs
- Bus architectures and AXI-Lite
- Hardware threads and interfacing
- SystemVerilog interfaces and testbenches
Sadly, no material from Chapters 8-10, other than possible questions related to the final project.